Communications of the ACM
CLA Team Reports Scalable Fabrication of Self-Aligned Graphene Transistors, Circuits
Credit: UCLA
University of California, Los Angeles researchers have developed a scalable approach to fabricating high-speed graphene transistors. The researchers used a dielectrophoresis assembly approach to place nanowire gate arrays on large-area chemical vapor deposition-growth graphene, which allows for the rational fabrication of high-speed transistor arrays. The method led to minimized parasitic delays and enabled the graphene transistors to have extrinsic cut-off frequencies of more than 50 GHz.
The graphene transistors also developed radio-frequency circuits that function at up to 10 GHz. The research could lead to scalable fabrication of high-speed, self-aligned graphene transistors and functional circuits that can reach beyond 50 GHz.
The researchers say their work represents a significant advance toward graphene-based, radio-frequency circuits that could be used in a variety of devices, such as radios, computers, mobile phones, wireless communication, imaging, and radar technologies.
From UCLA Newsroom
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Abstracts Copyright © 2011 Information Inc., Bethesda, Maryland, USA
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