The limits of Moore's Law, which states that about every two years, computer chips will become twice as fast and twice as small, may finally be in sight.
Transistors currently measure as small as 22 nanometers in width, and as they shrink, keeping them cool and error-free becomes more difficult. Now researchers around the world are designing smaller, faster, and more energy-efficient "sloppy chips' that can handle errors in their operation.
An international team of researchers at Rice University, the Swiss Center for Electronics and Microtechnology (CSEM), and Nanyang Technological University found that by reducing the operating voltage, sloppy chips could deliver equivalent performance to ordinary chips using 25 percent of the energy.
Another technique, known as pruning, involves wiring chips so more power is delivered to more important areas, while areas that compute non-essential data are given less power or removed altogether. Tests at CSEM found that pruned circuits were twice as fast, consumed half as much energy, and were half the size of conventional circuits. CSEM also is developing an error-prone chip for audio-visual processing in mobile phones that dispatches different processing tasks to the appropriate circuitry.
Another approach to managing errors, called asymmetric reliability, uses error-prone circuits for number crunching to save power and run faster, says Stanford University's Subhasish Mitra.
From The Economist
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