Communications of the ACM
Engineers Working to Prevent Heat Buildup Within 3-D Integrated Circuits
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University of Texas (UT) Arlington researchers are working to minimize the heat generated by silicon chips, and will then develop nano-windows that allow the heat to dissipate before it causes any damage.
Engineers have recently developed three-dimensional (3-D) integrated circuits in order to create more powerful chips, but they have struggled to manage the heat created by the devices. "These 3-D integrated circuits have led to significant performance improvements," says UT Arlington professor Ankur Jain. "However, when we stack these circuits on top of each other, heat starts to become a problem."
The researchers will investigate and measure fundamental thermal transport and thermomechanical properties of materials and interfaces in 3-D integrated circuit technology, according to UT Arlington professor Dereje Agonafer. Specifically, the researchers will study Through-Silicon Vias (TSVs), which are high-performance wires that allow integrated circuits to talk to each other and pass instructions from one level to the next. The TSVs have cooling effects that should boost the efficiency and speed of the 3-D integrated circuits. "Reducing heat just a little can translate to millions of dollars in savings down the road," says IBM fellow Roger Schmidt.
From University of Texas at Arlington
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