Communications of the ACM
Princeton Develops 25-Core Chip For Servers
Princeton University researchers have developed a new chip with a scalable architecture, which they believe can increase server performance and reduce energy consumption.
Credit: Princeton University
Researchers at Princeton University have developed Piton, a chip they believe can significantly boost server performance while reducing energy consumption.
The chip has a scalable architecture, enabling thousands of individual units to be stitched together into a single system containing millions of cores.
The current version of Piton measures six by six millimeters and contains more than 460 million transistors, each of which are as small as 32 nanometers. Most of the transistors are housed in 25 cores, compared to the four or eight cores found in traditional computer chips.
Princeton professor David Wentzlaff says the scalable architecture of Piton could enable thousands of cores on a single chip, with 500 million cores in a data center.
Piton relies on execution drafting, in which similar processes are lined up one after another, a process that can increase energy efficiency by about 20% compared to a standard core. In addition, the chip's memory traffic shaper can yield an 18% performance jump.
"We're also happy to give out our design to the world as open source, which has long been commonplace for software, but is almost never done for hardware," Wentzlaff says.
From The Engineer (United Kingdom)
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